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? january 2000 1/15 AN1231 - application note vipower: viper50 for usb self-powered hub a. bailly - f. grilli 1 1 scope this document presents the results obtained from a usb off-line power supply designed with viper50. this design is a complete solution for powering self-powered 4-ports hubs. it supplies the usb hub-controller by delivering up to 15w (this is more than enough to meet the usb requirements), 500ma each port. in the case that a 3.3v is needed, a voltage regulator can be added. 2 schematic the usb power supply is based on the standard schematic rcd-snubber-tl431 suggested in the viper software. the complete schematic is shown in figure 1. this circuit operates from 85vac to 275vac, with an output current, on 5v, varying from 20ma to 3a. the working frequency has been set to about 50khz (47.6khz) using r1=5.1k w and c5=8.2nf. the potentiometer p1 could be removed, if output adjustment is not necessary to compensate voltage drops on the following stages (mainly on power distributors). by removing p1 the value of r8 becomes the same of r7 (4k7) and a short-circuit must be placed between the ends of p1. 3.0 measurements unless otherwise noted, all measurements have been made with a high voltage dc source, ranging from 100v to 400v. this corresponds to an ac input voltage from 85vac (considering the voltage ripple of the bulk capacitor) to 280vac. universalmains +5v d2 1n4148 d6 stps1045 r1 5k1 r2 3k9 tr1 2 x 56mh c2 150n 275v~ c1 220n 275v~ c5 8n2 c4 47u c3 47u 400v c11 470u 25v f1 2at c7 0u47 c8 4n7/3kv r3 56k d3 stta106 c6 33n 630v c10 1000u 16v osc 1 vdd 2 drain 3 sourc 4 comp 5 ic1 viper50 45 21 6 iso1 tcdt1101g p1 2k2 r7 4k7 r8 3k3 c9 10n r4 6.8 d4 3v3 1/2w l1 d5 tl431 r5 330 2 1 5 4 7 6 10 9 tr2 2362.5003a eldor 1 2 con1 90-275vac 2 1 4 3 d1 df06720m r6 1k l2 2u7 c12 470u 25v figure 1: schematic diagram
2/15 AN1231 - application note 3.1 efficiency figure 2 gives the system efficiency measured for different output currents at 4 different values of input voltage. figure 3 reports in detail the efficiency for low output current up to 150ma. table 1: numerical values the behaviour of the previous curves gives the idea that the switching losses are preponderant versus conduction losses at a very low output current. using the mathematic capability of scope, it is possible to make an estimation of power losses. the measures have been done at 400vdc and full load: turn on losses: p on = 3.92 m j 47.6khz = 0.186w figure 4: turn on losses turn off losses: p off = 5.60 m j 47.6hz = 0.266w figure 5: turn off losses note that the right cursor has been set at about the same value as the turn on voltage. input voltage efficiency at 20ma efficiency at 1.5a efficiency at 3a 100v 22% 75% 74% 200v 18% 77% 77% 300v 16% 76% 77% 400v 15% 74% 77% figure 2: efficiency figure 3: efficiency at low current 0 0.5 1 1.5 2 2.5 3 output current (a) 0 10 20 30 40 50 60 70 80 90 % 100vdc 200vdc 300vdc 400vdc 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 output current (ma) 0 10 20 30 40 50 60 70 % 100vdc 200vdc 300vdc 400vdc
3/15 AN1231 - application note this assumes that nothing is dissipated at turn off, because the cross over time is only due to charge of the drain capacitance and the internal turn off of the power mosfet is sufficiently fast. the corre- sponding energy of this capacitor is dissipated at turn on, and this explains that only the part of volt- age which is discharged at turn on is taken into account at turn off. the conduction losses can be estimated as follows: p cd =t on /t sw r dson i p 2 /3 = 0.146w also the power dissipated by signal part and biasing resistor have to be considered (refer to an947 for a deeper analysis) in order to have the complete power dissipated by viper50 table 2. viper50 power dissipation the measured case temperature was 70.5 c for an ambient temperature of 23 c. this correspond to a dissipated power of about 0.8w with a ther- mal resistance of 60 c/w (free air, no heatsink) well in accordance with the above calculated losses. the stps1045 conduction power losses were calculated using the formula reported on the datasheet: p = 0.42i f(av) + 0.015i f 2 (rms) = 1.53w where, in the case of triangular waveform: i f(av) =i m d /2 i f 2 (rms) =i m 2 d /3 the power losses in the diode are double than those in the viper50. considering an ambient temperature of 70 c and a thermal resistance of 60 c/w in free air the viper can work without any heatsink (t jmax =120 c), while for the diode the heatsink is required. 3.2 burst mode when the output current is too low, the minimum duty-cycle fixed by the internal blanking time of the device is too high to control the output voltage. in such a case, the burst mode operation takes place automatically, thanks to the viper50 ability to maintain its power switch in the off state when the voltage on the compensation pin goes below 0.5v. figure 6: good burst mode this results in missing cycles, as shown on the scope waveforms reported in figure 6 (vin=400vdc, iout=30ma). the burst mode has a recurring period of about 400 m s, and 8 switching cycles take place each time. the output ripple is about 10mv and the vdd voltage is stable, just above the low threshold volt- age (8v) of the internal uvlo logic. this thresh- old can be reached by further reducing the output current, because it also reduces the vdd voltage on the primary side (less and less energy from the auxiliary winding). when this occurs, another type of burst mode appears, which is controlled by the parameter value p on 0.186w p off 0.266w p cd 0.146w p bias 0.140w p dd 0.120w p tot 0.858w
4/15 AN1231 - application note vdd voltage. this is called the abado burst mode. the following scope waveforms show what hap- pens in this case (vin=400vdc, iout=10ma). figure 7: bad burst mode each time that the vdd voltage reaches the low threshold voltage of the uvlo logic the device is reset and the vdd capacitor is charged back to the high threshold of the uvlo logic thanks to the start up current source that is turned on. the recurring period of this phenomenon is about 60ms. this behavior leads to the following draw- backs: 1. since the start up current source is activated to supply the device from the high voltage rail, the efficiency decreases dramatically. 2. the recurring period is very high, leading to a large output ripple. in the above example, this ripple is about 700mv, which is not acceptable for an output voltage of 5v. 3. this mode has very poor dynamic behavior in the case of output current variation. if an increase of output current occurs during the recharging phase, the output capacitor will be discharged down to 0v and the normal output voltage will return only at the next starting phase. in conclusion, the good burst mode has to be extended in the low output power range as much as possible, mainly optimizing the transformer. the bad burst mode occupies a very low range of output current, in which the power supply doesn't have its nominal performance. but the output volt- age is still under control (no overpassing the nom- inal voltage), and no stress is applied to the power supply. 3.3. load regulation 3.3.1. static regulation figure 8 shows the output regulation for an output current ranging from 20ma to 3a. the four curves have been done at different input voltages. figure 8: static load regulation the voltage drops from 20ma to 3a is about 50mv, this is mainly due to the resistance of the inductance ( ~ 20m w ) used in the output filter. connecting the resistive bridge on tl431 after the output inductor the 50mv drop in load regulation will be avoided. we prefer to leave the feedback connected after the diode, because in some real applications the inductance is not present, or the 0.02 0.20 0.40 0.60 0.80 1.00 1.20 1.40 1.60 1.80 2.00 2.20 2.40 2.60 2.80 3.00 output current (a) 4.96 4.97 4.98 4.99 5 5.01 5.02 output voltage (v) 100vdc 200vdc 300vdc 400vdc
5/15 AN1231 - application note lc filter (l2, c12) is split and dedicated for each downstream port. figure 9: dynamic behaviour for 0.66% to 100% of full load figure 10: dynamic behavior for 0.66% to 100% of full load 3.3.2. dynamic regulation the output current has been modulated by a square wave, from minimum load (20ma) to full load (3a), from minimum load to 50%, and from 50% to full load with an input voltage of 300vdc. figure 11: dynamic behavior for 100% to 0.66% of full load figure 12: dynamic behavior for 0.66% to 50% of full load
6/15 AN1231 - application note figure 13: dynamic behavior for 50% to 100% of full load 3.4. line regulation & switching noise the power supply has been connected to 85vac/ 50hz main lines (worst case, not even real) to measure the line rejection on the output. both the input voltage and the output voltage are reported in figure 14, with a full load operation. figure 14: dynamic line regulation at 100hz thanks to the excellent input voltage disturbances rejection of the device, the 100hz output ripple is 2.6mv against the 33v ripple on the bulk capaci- tor (-82db). the internal current control loop takes care of a good part of the input voltage variation, and the outer voltage loop makes the final improvements, thus reducing the output voltage variation to such levels. figure 15 shows the switching noise, at 47.6khz, on the output. the waveform is related to 220vac and an output current of 3a. figure 15: switching noise 3.5. turn on the input voltage of 300vdc has suddenly been applied to the power supply, and the output voltage monitored for different load conditions. the results are reported in figure 16. the starting slope is due to the value of c7 which defines the soft start time of the power supply. this time can be adjusted by choosing the value of this capacitor, but take care that this capacitor enter also in the loop calculation. the value of c4 must be changed accordingly in order to maintain the vdd voltage at a sufficient level during this soft start time.
7/15 AN1231 - application note figure 16: start up waveforms the start up time has also been measured using mains. this is given in figure 17, where all the input, vdd and output voltages are given at start up, for a full load condition. different input voltage does not affect the start up time, because it is due to an internal current generator that charges c4. the device starts to work when the vdd reaches 11v, as shown in figure 18 for 85vac and 275vac. figure 17: start up time figure 18: start up time at different vin 3.6. turn off the behavior of the power supply at turn off is reported in figures 19 and 20, for both the output and input voltages. it can be seen that the output voltage decreases in a monotone way, with no restart after it reaches the zero level. figure 19: turn off at 20ma load
8/15 AN1231 - application note figure 20: turn off at 3a load 3.7. normal operation the following figures show the voltage and current on the drain pin at different working conditions. with 85vac as the input voltage and 3a as the load, the power supply is at the limit of continuous mode, but this is not a problem for the ic. figure 21: normal operation 85vac, 20ma figure 22: normal operation 85vac, 3a figure 23: normal operation 275vac, 20ma
9/15 AN1231 - application note figure 24: normal operation 275vac, 20ma figure 25: normal operation 275vac, 3a 3.8. overload when the output current exceeds a certain value the vdd reaches 13v, the viper50 automatically passes into primary mode regulation. in the case that the overload increases together with limiting the current flowing inside the ic by the zener diode on the comp pin, the output voltage decreases to maintain vdd at 13v. figure 26: overload the output voltage at 100vdc decreases quickly because the system is in continuous mode. 4. improvements some modifications have been done on the design of figure 1 in order to improve the behavior of the power supply. in a real application where there are some protection devices between the output of the power supply and the downstream ports, user accessible, a short circuit will never be seen by the power supply, unless this happen due to a failure of the usb hub control circuit/device. 4.1. short circuit behavior with 400vdc input voltage, a short circuit has been made on the output of the power supply. this results in a permanent average current of about 11a, well above the transformer capability. figure 27 and 28 show iout and idiode in this condition. the viper50 is controlled only by thermal protection, when the internal temperature overcomes the ttds (see the datasheet) the device stops working. 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 4.8 5.0 5.2 5.4 5.6 5.8 6.0 output current (a) 1.5 2 2.5 3 3.5 4 4.5 5 5.5 output voltage (v) 100vdc 200vdc 300vdc 400vdc
10/15 AN1231 - application note figure 27: vdd and iout in short circuit figure 28: vdd and idiode in short circuit the protection which is foreseen for the viper50 consists of the monitoring of the vdd voltage and the switching off of the device when this voltage is below the low threshold voltage (8v) of the uvlo logic. this is done naturally when the output volt- age is low (i.e. in short circuit), because the auxil- iary winding is delivering a vdd voltage which is proportional to the output voltage. unfortunately, the transformer delivers some volt- age spikes at switch off on the auxiliary winding, as shown in figure 29 and 30. figure 29: vdd, vaux in normal operation figure 30: vdd, vaux in short circuit this spike is sufficient to maintain a correct supply voltage to the device, and even to increase its voltage up to the internal reference (13v) where the device decreases the peak current. actually the device is regulating its primary vdd voltage through the auxiliary winding spike. a solution to get rid of these spikes is to imple- ment a filter just by increasing r4. but this leads to poor performances in regulation, especially for light loads, where the bad burst mode will appear for a higher output current than now.
11/15 AN1231 - application note another solution consists of using an active switch instead of the r4. figure 31 presents a possible schematic with the addition of two more components, compared with the former one. figure 31. possible short circuit protection a bipolar transistor is inserted in series with the auxiliary winding and it is driven through an rc network. the rc delays the transistor turn on when the auxiliary winding begins to deliver posi- tive voltage, thus skipping the first spikes, as shown in the following figures. therefore, the vdd is more representative of what happens on the secondary side. figure 32: vdd, vaux and vaux' in normal operation figure 33: vdd, vaux and vaux' in short circuit note that r4 was doing the same thing, but in a less efficient way. in normal mode, this resistor avoids excessive vdd voltage, which should reach the internal reference voltage (13v) and interferes with the secondary feedback. with new design, it is possible to eliminate this resistor, and even to add a couple of turns on the auxiliary winding. as a result, the short circuit current is no more lim- ited by the vdd voltage and it increases because the viper50 is internally limited to 2a, which is double of what needed for full load. the zener diode d4 acts as clamper limiting the max peak current to a more reasonable level (about 1.25a), this avoids the transformer core saturation also during the start up. figure 34 gives the output short circuit current, using the above mentioned circuit the average output current is about 2a. this current is more acceptable than the previous one, and it appears that the converter is able to withstand indefinitely the short circuit condition. d2 1n4148 r4 6.8 2 1 5 4 7 6 10 9 tr2 2362.5003a eldor d2 1n4148 2k2 2 1 5 4 7 6 10 9 tr2 2362.5003a eldor bc327 470p
12/15 AN1231 - application note figure 34: vdd and iout in short circuit with improvements 5. conclusion it appears that the viper50 is well suited for such applications in which the output power ranges from hundreds of milli watts to a few dozen of watts. the most interesting points are: 1. the automatic burst mode which is imple- mented through an internal comparator on the compensation pin. this feature allows the control of very low load, by still maintaining a good effi- ciency, or offering very low input power for zero load operation. from this point of view, the trans- former design is very important, but the present note shows the good behavior of standard trans- formers. 2. in the case that the transformer doesn't demonstrate a good behavior in short circuit or shows an early intervention of primary regulation, a simple circuit (one general purpose pnp bipolar transistor, one small capacitor and one resistor) greatly improves the performances of the whole power supply.
13/15 AN1231 - application note annex 1 component list reference value part number note con1 2 pins connector c1 220n/275vac c10 1000u/16v fa series panasonic c11 470u/25v fa series panasonic c12 470u/25v hfz series panasonic c2 150n/275vac c3 47u/400v b43503 series siemens c4 47u c5 8n2 c6 33n/630v c7 0u47 c8 4n7/3kv murata c9 10n d1 bridge df06720m d2 1n4148 d3 600v-1a turbo stta106 stmicroelectronics d4 3v3 - 1/2w d5 adj. shunt reg. tl431 stmicroelectronics d6 45v-10a schttky stps1045 stmicroelectronics f1 2.0at-250vac ic1 viper50 stmicroelectronics iso1 optocoupler tcdt1101g temic l2 2u2 elc08d2r7e panasonic p1 2k2 r1 5k1 r2 3k9 r3 56k - 1w r4 6.8 r5 330 r6 1k r7 4k7 r8 3k3 tr1 2 x 56mh 42h270500 radiohm tr2 15w transformer 2362.5003a eldor
14/15 AN1231 - application note annex 2 transformer specification primary inductance : 0.82 mh primary leakage inductance : 30 m h (max) core : e20-10-6 material : n27 gap : 0.4mm transformer diagram windings mechanical drawings 2 1 5 4 7 6 10 9 2362.5003a eldor 17 turns 83 turns 8 turns 8 turns 0.28mm/g2 0.28mm/g2 0.50mm/tiw 0.50mm/tiw core center leg 1 2 1 2 5 4 7 6 10 9 tape
15/15 AN1231 - application note information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. the st logo is a trademark of stmicroelectronics ? 2000 stmicroelectronics - printed in italy- all rights reserved. stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - u.s.a. http://www.st.com

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